Northrop Grumman Internship 2024
During the summer of 2024, I had the opportunity to intern at Northrop Grumman within the Mission Systems (MS) sector, located in Linthicum Heights, MD. This 10-week internship placed me on a research and development firmware team, where I focused on projects involving Field-Programmable Gate Arrays (FPGAs), RTL design, and system validation.
I contributed to the development of an FPGA developer library designed to enhance device portability. The primary objective was to achieve FPGA vendor optimization while maintaining consistent functionality across different hardware vendors (i.e. Xilinx and Intel). Although the library was in its early stages during my internship, it was an innovative approach to minimizing maintenance requirements when adapting to hardware changes. Essentially, the library functioned as a “translation device,” converting optimizations to ensure seamless hardware integration.
The tests were lengthy, so I had spare time to work on other tasks. In addition to my technical responsibilities, I took the initiative to design the first iteration of the library’s logo. This creative task, though outside my core assignment, allowed me to explore my graphic design skills. After creating 29 versions and collaborating closely with my team, we finalized a logo that I hope will become a lasting symbol of the project.
I contributed to the development of an FPGA developer library designed to enhance device portability. The primary objective was to achieve FPGA vendor optimization while maintaining consistent functionality across different hardware vendors (i.e. Xilinx and Intel). Although the library was in its early stages during my internship, it was an innovative approach to minimizing maintenance requirements when adapting to hardware changes. Essentially, the library functioned as a “translation device,” converting optimizations to ensure seamless hardware integration.
The tests were lengthy, so I had spare time to work on other tasks. In addition to my technical responsibilities, I took the initiative to design the first iteration of the library’s logo. This creative task, though outside my core assignment, allowed me to explore my graphic design skills. After creating 29 versions and collaborating closely with my team, we finalized a logo that I hope will become a lasting symbol of the project.
Tasks
Vivado Version Migration
Validated library behavior with a newer Vivado version. Troubleshooted any version compatibility errors or pre-existing bugs.
Development of a New Library Component
Utilized both Xilinx and Intel RAM macros to develop a component for the developer library. Ensured that the new component works as intended given the utilization reports and simulation waveforms.
Tools and Skills
Xilinx Vivado
Vivado was the software used to synthesize the library’s macros for Xilinx FPGAs. For this internship, I used the LINUX version (i.e. v2020.2 and v2023.2).
Intel Quartus Prime
Quartus Prime was the software used to synthesize the library’s macros for Intel FPGAs. For this internship, I used the LINUX version (i.e. v2021.2 and v2023.4).
cocotb
A Python verification framework, specifically for creating testbenches for HDL code. All gate-level simulations were developed in Python.
VHDL
At the time, the HDL files were using VHDL, including all behavioral and synthesis versions of the components.
Visual Studio Code
My main text editor of choice was Visual Studio Code. I developed the HDL code, bash scripts, and testbench code on this software.
Bash & TCL Scripting
To automate tests and synthesis, I utilized bash and TCL scripting in a LINUX environment to synthesize, test, and create utilization reports for numerous cases.
